Test Time Minimization for Hybrid BIST of Core-Based Systems
نویسندگان
چکیده
منابع مشابه
Test Time Minimization for Hybrid BIST of Systems-on-Chip
The main goal of this thesis was to develop an experimental environment for the test time minimization problem. It assumes Hybrid BIST architecture and targets System-on-Chip designs. The thesis is based on methodology developed during the work and demonstrates the feasibility of the proposed methodology together with experimental results. First two sections of this thesis explore the actuality...
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ژورنال
عنوان ژورنال: Journal of Computer Science and Technology
سال: 2006
ISSN: 1000-9000,1860-4749
DOI: 10.1007/s11390-006-0907-x